Pushing the limits of Moore’s Law

Moore’s Law has described expo­nen­tial growth in com­put­ing pow­er for decades, dou­bling tran­sis­tor den­si­ty approx­i­mate­ly every two years. This remark­able pro­gres­sion has enabled trans­for­ma­tive advances from per­son­al com­put­ers and smart­phones to cloud com­put­ing and arti­fi­cial intel­li­gence. How­ev­er, this con­tin­ued advance­ment now faces a crit­i­cal bar­ri­er: sta­ble pow­er delivery.

As tran­sis­tors become more dense­ly packed and switch at faster rates in today’s advanced proces­sors, volt­age fluc­tu­a­tions in the pow­er sup­ply cre­ate increas­ing inter­fer­ence prob­lems. These fluc­tu­a­tions, known as tran­sients, can cause seri­ous errors in chip oper­a­tion and have emerged as the pri­ma­ry obsta­cle to fur­ther per­for­mance gains in AI, high-per­for­mance com­put­ing, and mobile applications.

The solu­tion to this chal­lenge requires ener­gy reser­voirs – capac­i­tors – posi­tioned as close as pos­si­ble to the tran­sis­tors to smooth out these pow­er fluc­tu­a­tions. For the most advanced chips, these capac­i­tors must be mount­ed direct­ly under­neath the proces­sor pack­age in the extreme­ly lim­it­ed space between the chip and the cir­cuit board. This place­ment is not option­al but essen­tial, as it’s the clos­est pos­si­ble posi­tion with­out inte­grat­ing capac­i­tors into the chip itself.

This neces­si­ty cre­ates spe­cif­ic and demand­ing tech­ni­cal requirements:

1. Ultra-thin pro­file: The capac­i­tors must be no high­er than the sol­der balls or bumps con­nect­ing the chip to the cir­cuit board – typ­i­cal­ly just tens of microns thick.
2. Min­i­mal foot­print: They must fit between the increas­ing­ly dense inter­con­nects on the under­side of the chip package.
3. High capac­i­tance: Despite these size con­straints, they must store suf­fi­cient ener­gy to effec­tive­ly sta­bi­lize the pow­er supply.

Crit­i­cal­ly, exist­ing tech­nolo­gies are fail­ing to meet these com­bined require­ments cost-effectively:

• Mul­ti­lay­er ceram­ic capac­i­tors (MLCCs) have reached their fun­da­men­tal minia­tur­iza­tion limits.
• Deep trench capac­i­tors (DTCs) face pro­hib­i­tive man­u­fac­tur­ing costs and inher­ent phys­i­cal lim­i­ta­tions in their sub­trac­tive man­u­fac­tur­ing approach.

This cre­ates both a sig­nif­i­cant mar­ket gap and an excep­tion­al oppor­tu­ni­ty for innovation.

Smoltek Semi direct­ly address­es this unmet need with our CNF-MIM tech­nol­o­gy. By uti­liz­ing car­bon nanofibers in an addi­tive man­u­fac­tur­ing process, we cre­ate capac­i­tors that deliv­er the nec­es­sary capac­i­tance with­in these extreme phys­i­cal con­straints – and at a low­er pro­duc­tion cost than com­pet­ing approach­es. This allows us to enable the con­tin­ued scal­ing that next-gen­er­a­tion elec­tron­ics require, effec­tive­ly push­ing back the lim­its that threat­en Moore’s Law.

By solv­ing this crit­i­cal pow­er deliv­ery chal­lenge, Smoltek Semi enables the con­tin­ued advance­ment of elec­tron­ic per­for­mance for smart­phones, high-per­for­mance com­put­ing sys­tems, and AI servers that will dri­ve the next wave of tech­no­log­i­cal innovation.